Showing posts with label ADC USING SUCCESSIVE-APPROXIMATION TECHNIQUE. Show all posts
Showing posts with label ADC USING SUCCESSIVE-APPROXIMATION TECHNIQUE. Show all posts

Saturday, 28 December 2013

ADC USING SUCCESSIVE-APPROXIMATION TECHNIQUE

                   
                   ADC USING SUCCESSIVE-APPROXIMATION

     A successive approximation ADC is a type of analog-to-digital converter that converts a continuous analog waveform into a discrete digital representation via a binary search through all possible quantization levels before finally converging upon a digital output for each conversion.

BLOCK DIAGRAM:

                   Fig 1: Successive Approximation ADC Block Diagram




 Block Explanation:

     
  1. A sample and hold(S/H) circuit to acquire the input voltage (Vin).
  2. An analog voltage comparator that compares Vin with the output of the internal DAC and  the result of the comparison outputs is given to the successive approximation register (SAR).
  3. A successive approximation register subcircuit designed to supply an approximate digital code of Vin to the internal DAC.
  4. An internal reference DAC that, for comparison with V, supplies the comparator with an analog voltage equal to the digital code output of the SARin.
                       COMPARATOR  
       Using 741 om-amp to do the comparator operation, the op-amp contain two input one is inverter i/p(-) and another is non inverter i/p(+) see (fig 2), 
fig 2: Comparator.




  It compares two voltages or currents and outputs is digital logic as show in table. It has two analog input terminals V_+\, and V_-\, and one binary digital output V_o\,. The output is ideally( either high or low),
   

V_o = 
\begin{cases} 
1,  & \mbox{if }V_+ > V_-  \\
0,  & \mbox{if }V_+ < V_- 
\end{cases}